Several types of memory devices, such as Flash memories, use arrays of analog memory cells for storing data. Each analog memory cell stores a quantity of an analog value, such as an electrical charge or voltage, which represents the information stored in the cell. In Flash memories, for example, each analog memory cell holds a certain amount of electrical charge. The range of possible analog values is typically divided into regions, each region corresponding to one or more data bit values. Data are written to an analog memory cell by writing a nominal analog value that corresponds to the desired bit or bits. The possible bit values that can be stored in an analog memory cell are also referred to as the memory states of the cell.
Some memory devices, commonly referred to as Single-Level Cell (SLC) devices, store a single bit of information in each memory cell, i.e., each memory cell can be programmed to assume one of two possible memory states. Higher-density devices, often referred to as Multi-Level Cell (MLC) devices, can be programmed to assume more than two possible memory states and thus store two or more bits per memory cell. In some cases, the number of bits stored per cell and the nominal analog values used in storing the bits may be varied in the course of operation of a memory.
For example, U.S. Pat. Nos. 6,643,169 and 6,870,767, whose disclosures are incorporated herein by reference, point out that there exists a tradeoff between the fidelity of data storage and the number of bits stored in a memory cell. The number of bits per cell may be increased when fidelity is less important and decreased when fidelity is more important. These patents describe a memory that can change between storage modes on a cell by cell basis.
Similarly, U.S. Pat. No. 6,466,476, whose disclosure is incorporated herein by reference, describes a multi-bit-per-cell non-volatile memory that stores different portions of a data stream using different numbers of bits per cell. In particular, data that require a high degree of data integrity (such as the header of a data frame) are stored using a relatively small number of bits per memory cell, while more error-tolerant data (such as music, images, or video) are stored using a relatively large number of bits per memory cell. Write circuitry decodes an input data stream and determines the number of bits to be written in each memory cell.
U.S. Patent Application Publication 2005/0024941, whose disclosure is incorporated herein by reference, describes a method and system for archiving data according to the desired data lifetime. For example, short-term data can be archived using larger programming voltage pulse increments than for long-term data; using a lower target threshold voltage than for long-term data; using wider programming voltage pulses than for long-term data; using higher starting programming voltages than for long-term data; using fewer programming voltage pulses than for long term data; using lower maximum programming voltages than for long term data; or using more levels per cell than for long-term data.